Winbond Introduces New Low-Density DDR3 SDRAMNovember 29, 2016
With the demand for lighter, thinner, and low-power devices rising steadily, it is driving a growing need for reliable and cost-effective power management solutions in designing feature-rich devices. In order to maintain high performance in their devices, it’s becoming a market imperative for OEMs to opt for memory solutions that have features such as high-speed, low-power consumption and down-sizing.
In keeping with these trends, Winbond, a premier manufacturer of specialty DRAM, has introduced their new product line of low-density 512 Mb DDR3/3L SDRAM, which is now available in the market. The newest Winbond release not only renders 1600 Mbps high-speed performances, it also qualifies for the industrial operating standard under severe temperatures ranging from -40oC ~ 105 oC.
Strengthened by their domain expertise gained over decades, Winbond’s new product is ideal for critical applications including SSD, power equipment, printer, networking, and other related platforms. This latest product features two types of I/O interface: x8, and x16, both supporting the FBGA78/96 packaging in compliance with RoHS and JGPSSI regulation.
Winbond is now open to customers applying for KGD (Known Good Die) in SiP (System in Package) process, helping and assisting them to clear the concerns they might be having. In addition to this, the new product has "one side edge pad" design, making it exceptionally user-friendly and cost-effective for customers.
Facts and Features of Winbond Low-Density DDR3 SDRAM
- Power Supply: VDD, VDDQ = 1.5V ± 0.075V
- Double Data Rate architecture: two data transfers per clock cycle
- Eight internal banks for concurrent operation
- 8 bit prefetch architecture
- CAS Latency: 6, 7, 8, 9, 10, 11 and 13
- Burst length 8 (BL8) and burst chop 4 (BC4) modes: fixed via mode register (MRS) or selectable On-The-Fly (OTF)
- Programmable read burst ordering: interleaved or nibble sequential
- Bi-directional, differential data strobes (DQS and DQS#) are transmitted / received with data
- Edge-aligned with read data and center-aligned with write data
- DLL aligns DQ and DQS transitions with clock
- Differential clock inputs (CK and CK#)
- Commands entered on each positive CK edge, data and data mask are referenced to both edges of a differential data strobe pair (double data rate)
- Posted CAS with programmable additive latency (AL = 0, CL - 1 and CL - 2) for improved command, address and data bus efficiency
- Read Latency = Additive Latency plus CAS Latency (RL = AL + CL)
- Auto-precharge operation for read and write bursts
- Refresh, Self-Refresh, Auto Self-refresh (ASR) and Partial array self-refresh (PASR)
- Precharged Power Down and Active Power Down
- Data masks (DM) for write data
- Programmable CAS Write Latency (CWL) per operating frequency
- Write Latency WL = AL + CWL
- Multipurpose register (MPR) for readout a predefined system timing calibration bit sequence
Winbond's complete product line includes specialty DRAM, mobile DRAM, and Flash memory in varying densities, offering top performances and highly competitive solutions to customers.
For further information regarding datasheets, L/T, prices, and samples of the new low-density DDR3 SDRAM, please contact WPGA team.